1. Field of the Invention
The present invention relates to a method and an apparatus for booting a microprocessor system using a flash memory device storing boot code, and more particularly to a method and an apparatus for booting a microprocessor system using a serial (e.g., NAND) flash memory device including a RAM buffer having a random-access interface.
2. Description of the Related Art
when a mobile computing device, such as a mobile phone, a personal digital assistant (PDA), a portable multimedia player (PMP) or a laptop computer, or a general computing device, such as a desktop computer, is turned on, a booting process is started. In the booting process, internal elements (e.g., registers, RAM) are initialized and application code, for example, an operating system (OS) program, stored in a non-volatile storage device (e.g., a hard disc drive, HDD) is transferred (loaded, copied) to a main (Random Access Memory, RAM) processor memory for execution by the microprocessor.
In the past, a read-only memory (ROM) was provided as a storage device for storing boot code (e.g., BIOS, Basic Input/Output System) including routines for booting the system. The primary function of BIOS is to prepare the machine so other software programs stored on various media (such as hard drives, floppies, and CDs) can load, execute, and assume control of the computer. This process is known as booting up. Alternatively, an erasable programmable read-only memory (EPROM) was provided as the storage device for storing boot code in order to facilitate updating of the boot code. More recently, semiconductor and other solid state storage devices capable of writing and electrically erasing data are being used for storing executable code for booting systems. For example, an electrically erasable programmable read-only memory (EEPROM), a NOR flash memory, a divided bit-line NOR (DINOR) flash memory (which has a modified structure of a NOR flash memory), a NAND flash memory and/or an AND flash memory are used. The four primary architectures for flash memory design are NOR, NAND, AND, and DINOR.
The EEPROM, the NOR flash memory and the DINOR flash memory are similar in that they each provide a contact electrode for each bit line, and each cell is connected to a bit line, so that the EEPROM, the NOR flash memory and the DINOR flash memory may read and write arbitrary address data irrespective of the order that the data is stored in the cells (random access of the memory). A non-volatile semiconductor device, such as the EEPROM, the NOR flash memory or the DINOR flash memory, in which the cells are arranged in parallel between bit lines and ground lines, may be referred to as a parallel flash memory.
On the other hand, the NAND flash memory or the AND flash memory, in which the cells are connected in series between the bit lines and ground lines, may be referred to as a serial flash memory. The degree of integration (circuit density) of the serial flash memory may be higher than that of the parallel flash memory. The efficiencies of NAND flash memory devices are due to the lack of metal contacts in the NAND cell string. NAND flash memory cell size is smaller than NOR flash memory cell size, due to the fact that NOR cells require a separate metal contact for each cell. Despite a high degree of integration (circuit density), the serial (e.g., NAND) flash memory has a limitation in that byte-unit operations (random access of individual bytes) may be impossible. Thus, the parallel flash memory is conventionally employed as a code executing device, and the serial flash memory is conventionally employed as a data storage device. NAND flash's advantages are fast write (program) and erase operations, and conventionally, NOR flash's advantages are random access and byte write capability. NOR flash's random access ability allows for execution in place (XiP) of code stored therein, which is often a requirement in embedded applications.
FIGS. 1 and 2 are block diagrams illustrating conventional booting systems. FIG. 1 illustrates a conventional booting system using a parallel (NOR) flash memory and FIG. 2 illustrates a conventional booting system using a serial (NAND) flash memory.
Referring to FIG. 1, when power of a system is powered on, OS boot code is transferred (loaded, copied) from a NOR flash memory 12 to a main controller (microprocessor) 10 through a system bus 11. The main controller 10 performs a booting process according to a routine in the OS boot code with random access of individual bytes stored in the parallel (NOR) flash memory, and so a boot loader having a routine for loading an OS image into a main memory may not be needed. An OS image necessary for the booting process may be included in the OS boot code to be provided to the main controller 10. In addition, the OS image may also be stored in a non-volatile storage device such as a hard disk drive. The main controller 10 performs loading of the OS image into the main memory 13 according to a routine in the OS boot code.
Referring to FIG. 2, when the system is powered on, a main controller (microprocessor) 20 performs reading of a boot loader stored in a boot ROM 23. Random access or execution in place (XiP) of individual bytes of code may not be possible in the serial (NAND) flash memory, and so a boot loader having a routine for loading an OS image into a main memory may be needed. The main controller 20 performs loading of an OS image stored in a NAND flash memory 25 into a main memory 21, according to a routine of the boot loader copied from the boot ROM 23. The OS image is loaded into the main memory 21. A NAND flash controller 24 performs transferring of commands and data received from a system bus 22 to the NAND flash memory 25, and provides data transferred from the NAND flash memory 25 to the system bus 22.
Some booting systems include OS boot code or a boot loader in an internal ROM, while other booting systems obtain the OS boot code or the boot loader from an external device of a microprocessor, namely, a main controller of a memory.
FIG. 3 is a block diagram illustrating a conventional booting system.
Referring to FIG. 3, the booting system includes a microprocessor 30, a NAND flash controller 40, a NAND flash memory 45, and a main memory 50.
The microprocessor 30 includes a central processing unit (CPU) core 31, an internal ROM 32 storing a boot loader, an internal RAM 33, and an interface 35.
When power is turned on, the CPU core 31 accesses the internal ROM 32 through the internal bus 34, so that the boot loader stored in the internal ROM 32 is executed. The microprocessor 30 copies (loads) an OS image stored in the NAND flash memory 45 into the main memory 50, according to (by executing) a routine of the boot loader. The NAND flash controller 40 operatively connects (interfaces) the NAND flash memory 45 with a system bus 60.
The ROM 33 included in the microprocessor 30 typically stores initialization code that initializes a subsystem of a CPU core, code for booting a system, and monitor-program code that downloads application code from a flash memory, and so on. Because the code for booting the system (boot code) is stored in the internal ROM, the booting system may be safe from hacking or from errors that may be generated from an updating process of the OS image. In addition, a developer of the booting system may protect proprietary (e.g., trade-secret) code or information by including the confidential library modules in the internal ROM.
Recently, both NOR flash memories and NAND flash memories have been employed as external storage device of a microprocessor used (like a hard drive) for storing application code necessary for booting in a booting systems using boot code stored in an internal ROM.
The NOR flash memory supports random access of stored code, but prices of the NOR flash memory are high. Computing devices accommodating ever larger sized application code are constantly being developed, and thus the prices of the computing devices are rising due to the high prices of the larger NOR flash memory used to store the large application code.
Prices of NAND flash memory are typically lower than that of the NOR flash memory, but conventional NAND flash memory does not support random access of data (e.g., executable code) stored therein. Thus, in a case where a booting system uses NAND flash memory, boot code may be stored in an internal ROM 32 as shown in FIG. 3, or in an external ROM 23 as shown in FIG. 2, so as to transfer application code stored in the NAND flash memory to a main memory for random access execution (e.g., execution in place). When the boot code is stored in the internal ROM (32 as shown in FIG. 3), a microprocessor including the internal ROM 32 may be dependent upon the exact configuration of the NAND flash memory, so that flexibility of the microprocessor may be decreased. Therefore, a method of booting a microprocessor system (e.g., a microprocessor system including an internal ROM) using relatively inexpensive serial flash memory, such as the NAND flash memory, while ensuring the flexibility of the microprocessor is needed.